220 search results - page 35 / 44 » SMOS L1 algorithms |
ISCA
2008
IEEE
14 years 2 months ago
2008
IEEE
Multicore processors have emerged as a powerful platform on which to efficiently exploit thread-level parallelism (TLP). However, due to Amdahl’s Law, such designs will be incr...
DATE
2006
IEEE
14 years 1 months ago
2006
IEEE
Memory elements are the most vulnerable system component to soft errors. Since memory elements in cache arrays consume a large fraction of the die in modern microprocessors, the p...
ISLPED
2005
ACM
14 years 1 months ago
2005
ACM
As transistors keep shrinking and on-chip data caches keep growing, static power dissipation due to leakage of caches takes an increasing fraction of total power in processors. Se...
ECML
2005
Springer
14 years 1 months ago
2005
Springer
ABSTRACT. Estimating a non-uniformly sampled function from a set of learning points is a classical regression problem. Kernel methods have been widely used in this context, but eve...
ICPP
2003
IEEE
14 years 29 days ago
2003
IEEE
Aggressive hardware-based and software-based prefetch algorithms for hiding memory access latencies were proposed to bridge the gap of the expanding speed disparity between proces...