175 search results - page 7 / 35 » SOC Testing Methodology and Practice |
DAC
2001
ACM
14 years 8 months ago
2001
ACM
Crosstalk effects degrade the integrity of signals traveling on long interconnects and must be addressed during manufacturing testing. External testing for crosstalk is expensive ...
DAC
2002
ACM
14 years 8 months ago
2002
ACM
At-speed testing of high-speed circuits is becoming increasingly difficult with external testers due to the growing gap between design and tester performance, growing cost of high...
DATE
2002
IEEE
14 years 12 days ago
2002
IEEE
System-on-chip (SOC) design methodology is becoming the trend in the IC industry. Integrating reusable cores from multiple sources is essential in SOC design, and different design...
DFT
2005
IEEE
14 years 1 months ago
2005
IEEE
This paper presents a new test methodology which utilizes the Programming Language Interface (PLI) for performing fault simulation of combinational or full scan Intellectual Prope...
ICCD
2003
IEEE
14 years 22 days ago
2003
IEEE
Excessive switching activity during shift cycles in scan-based cores imposes considerable test power challenges. To ensure rapid and reliable test of SOCs, we propose a scan chain...