174 search results - page 18 / 35 » Schedule-aware performance estimation of communication archi... |
FLAIRS
2003
13 years 9 months ago
2003
We have developed a model-based, distributed architecture that integrates diverse components in a system designed for lunar and planetary surface operations: an astronaut’s spac...
DAC
2003
ACM
2003
ACM
A complexity effective communication model for behavioral modeling of signal processing applications
14 years 9 months ago
In this paper, we argue that the address space of memory regions that participate in inter task communication is over-specified by the traditional communication models used in beh...
GLVLSI
2010
IEEE
14 years 1 months ago
2010
IEEE
On-chip memory organization is one of the most important aspects that can influence the overall system behavior in multiprocessor systems. Following the trend set by high-perform...
PPL
2008
13 years 8 months ago
2008
As the number of integrated IP cores in the current System-on-Chips (SoCs) keeps increasing, communication requirements among cores can not be sufficiently satisfied using either ...
TCAD
2008
13 years 8 months ago
2008
Latency-insensitive protocols allow system-on-chip (SoC) engineers to decouple the design of the computing cores from the design of the intercore communication channels while follo...