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GLVLSI
2010
IEEE
178views VLSI» more  GLVLSI 2010»
14 years 12 days ago
Improving the testability and reliability of sequential circuits with invariant logic
In this paper, we investigate dual applications for logic implications, which can provide both online error detection capabilities and improve the testing efficiency of an integr...
Nuno Alves, Kundan Nepal, Jennifer Dworak, R. Iris...
ITC
2000
IEEE
104views Hardware» more  ITC 2000»
13 years 12 months ago
Application of deterministic logic BIST on industrial circuits
We present the application of a deterministic logic BIST scheme on state-of-the-art industrial circuits. Experimental results show that complete fault coverage can be achieved for...
Gundolf Kiefer, Hans-Joachim Wunderlich, Harald P....
DDECS
2007
IEEE
127views Hardware» more  DDECS 2007»
14 years 1 months ago
Instance Generation for SAT-based ATPG
— Recently, there is a renewed interest in Automatic Test Pattern Generation (ATPG) based on Boolean Satisfiability (SAT). This results from the availability of very powerful SA...
Daniel Tille, Görschwin Fey, Rolf Drechsler
DATE
2010
IEEE
134views Hardware» more  DATE 2010»
14 years 20 days ago
Layout-aware pseudo-functional testing for critical paths considering power supply noise effects
When testing delay faults on critical paths, conventional structural test patterns may be applied in functionally-unreachable states, leading to over-testing or under-testing of t...
Xiao Liu, Yubin Zhang, Feng Yuan, Qiang Xu
EURODAC
1994
IEEE
94views VHDL» more  EURODAC 1994»
13 years 11 months ago
A Study of Undetectable Non-Feedback Shorts for the Purpose of Physical-DFT
Undetectable shorts may decrease the long term reliability of a circuit, cause intermittent failures, add noise and delay, or increase test pattern generation costs. This paper de...
Richard McGowen, F. Joel Ferguson