49 search results - page 5 / 10 » Sensitivity-Based Gate Delay Propagation in Static Timing An... |
ICCAD
2005
IEEE
14 years 4 months ago
2005
IEEE
— Variability in the chip design process has been relatively increasing with technology scaling to smaller dimensions. Using worst case analysis for circuit optimization severely...
DAC
2004
ACM
13 years 11 months ago
2004
ACM
There is an increased dominance of intra-die process variations, creating a need for an accurate and fast statistical timing analysis. Most of the recent proposed approaches assum...
VLSID
2004
IEEE
14 years 8 months ago
2004
IEEE
Abstract--In this paper, we present a new approach to calculate the steady state resistance values for CMOS library gates. These resistances are defined as simple equivalent models...
DAC
2006
ACM
14 years 8 months ago
2006
ACM
We propose a scalable and efficient parameterized block-based statistical static timing analysis algorithm incorporating both Gaussian and non-Gaussian parameter distributions, ca...
DATE
2007
IEEE
14 years 2 months ago
2007
IEEE
— We present a waveform based variational static timing analysis methodology. It is a timing paradigm that lies midway between convention static delay approximations and full dyn...