1304 search results - page 174 / 261 » Simulation of Soliton Circuits |
151
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ISQED
2010
IEEE
16 years 20 days ago
2010
IEEE
With the CMOS transistors being scaled to sub 45nm and lower, Negative Bias Temperature Instability (NBTI) has become a major concern due to its impact on PMOS transistor aging pr...
135
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ISQED
2009
IEEE
16 years 18 days ago
2009
IEEE
An outstanding challenge for realizing nanoelectronic systems is nano-interface design, i.e., how to precisely access a nanoscale wire in an array for communication between a nano...
136
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DATE
2008
IEEE
16 years 7 days ago
2008
IEEE
Comparator-based switched capacitor (CBSC) circuits present an alternative approach to designing sampled data systems based on the principle of detecting a virtual ground conditio...
134
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DATE
2008
IEEE
16 years 7 days ago
2008
IEEE
To achieve minimum signal propagation delay, the nonuniform wire width routing architecture has been widely used in modern VLSI design. The non-uniform routing architecture exploi...
136
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ISCAS
2008
IEEE
16 years 6 days ago
2008
IEEE
—In this paper a new ADC architecture of flash type is proposed. This proposed N-bit flash ADC replaces the (2N -1)-toN encoder with two (2N/2 -1)-to-(N/2) encoders to accomplish...