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DATE
2004
IEEE
134views Hardware» more  DATE 2004»
13 years 11 months ago
Cost-Efficient Block Verification for a UMTS Up-Link Chip-Rate Coprocessor
ASIC designs for future communication applications cannot be simulated exhaustively. Formal Property Checking is a powerful technology to overcome the limitations of current funct...
Klaus Winkelmann, Hans-Joachim Trylus, Dominik Sto...
INFOCOM
2006
IEEE
14 years 1 months ago
TCP Internal Buffers Optimization for Fast Long-Distance Links
— In recent years, issues regarding the behavior of TCP in high-speed and long-distance networks have been extensively addressed in the networking research community, both becaus...
Andrea Baiocchi, Saverio Mascolo, Francesco Vacirc...
ITC
2003
IEEE
139views Hardware» more  ITC 2003»
14 years 26 days ago
Fault Pattern Oriented Defect Diagnosis for Memories
Failure analysis (FA) and diagnosis of memory cores plays a key role in system-on-chip (SOC) product development and yield ramp-up. Conventional FA based on bitmaps and the experi...
Chih-Wea Wang, Kuo-Liang Cheng, Jih-Nung Lee, Yung...
DATE
2000
IEEE
132views Hardware» more  DATE 2000»
14 years 14 hour ago
Automatic Test Bench Generation for Validation of RT-Level Descriptions: An Industrial Experience
In current microprocessors and systems, an increasingly high silicon portion is derived through automatic synthesis, with designers working exclusively at the RT-level, and design...
Fulvio Corno, Matteo Sonza Reorda, Giovanni Squill...
IROS
2009
IEEE
183views Robotics» more  IROS 2009»
14 years 2 months ago
Image based visual servoing using algebraic curves applied to shape alignment
— Visual servoing schemes generally employ various image features (points, lines, moments etc.) in their control formulation. This paper presents a novel method for using boundar...
Ahmet Yasin Yazicioglu, Berk Calli, Mustafa Unel