57 search results - page 3 / 12 » Sizing Rules for Bipolar Analog Circuit Design |
ICCAD
2001
IEEE
14 years 4 months ago
2001
IEEE
This paper presents a method to automatically generate posynomial response surface models for the performance parameters of analog integrated circuits. The posynomial models enabl...
ICCAD
1994
IEEE
13 years 11 months ago
1994
IEEE
? We describe a synthesis system that takes operating range constraints and inter- and intra- circuit parametric manufacturing variations into account while designing a sized and b...
ASPDAC
2007
ACM
13 years 11 months ago
2007
ACM
-- Analog circuit sizing under process/parameter variations is formulated as a mini-max geometric programming problem. To tackle such problem, we present a new method that combines...
DATE
2009
IEEE
14 years 2 months ago
2009
IEEE
— This paper introduces a graph grammar based approach to automated topology synthesis of analog circuits. A grammar is developed to generate circuits through production rules, t...
ICCAD
2008
IEEE
14 years 2 months ago
2008
IEEE
This paper presents ISCLEs, a novel and robust analog design method that promises to scale with Moore’s Law, by doing boosting-style importance sampling on digital-sized circuit...