50 search results - page 6 / 10 » Soft Scheduling in High Level Synthesis |
DAC
1999
ACM
14 years 25 days ago
1999
ACM
This paper presents a design methodology, called common-case computation (CCC), and new design automation algorithms for optimizing power consumption or performance. The proposed ...
DATE
2005
IEEE
14 years 2 months ago
2005
IEEE
Context-aware applications pose new challenges, including a need for new computational models, uncertainty management, and efficient optimization under uncertainty. Uncertainty c...
ICCAD
1994
IEEE
14 years 20 days ago
1994
IEEE
In high level synthesis each node of a synchronous dataflow graph (DFG) is scheduled to a specific time and allocated to a processor. In this paper we present new integer linear p...
ICCAD
1997
IEEE
14 years 22 days ago
1997
IEEE
This paper presents a new approach to hierarchical high-level synthesis with respect to internal register-transfer structures of complex components. Entire subdesigns can efficie...
VLSID
2003
IEEE
14 years 9 months ago
2003
IEEE
In this paper, we describe two new algorithms for datapath scheduling which aim at energy reduction while maintaining performance. The proposed algorithms, time constrained and re...