155 search results - page 8 / 31 » Soft delay error analysis in logic circuits |
DATE
2009
IEEE
14 years 2 months ago
2009
IEEE
There is a growing concern about timing errors resulting from design marginalities and the effects of circuit aging on speed-paths in logic circuits. This paper presents a low ove...
DAC
2006
ACM
14 years 8 months ago
2006
ACM
Due to the shrinking of feature size and reduction in supply voltages, nanoscale circuits have become more susceptible to radiation induced transient faults. In this paper, we pre...
DATE
2005
IEEE
14 years 1 months ago
2005
IEEE
Soft errors are an increasingly serious problem for logic circuits. To estimate the effects of soft errors on such circuits, we develop a general computational framework based on ...
DAC
2005
ACM
13 years 9 months ago
2005
ACM
1 This paper presents a transient faults sensitivity evaluation for Quasi Delay Insensitive (QDI) asynchronous circuits. Because of their specific architecture, asynchronous circui...
DAC
1994
ACM
13 years 11 months ago
1994
ACM
Manufacturing disturbances are inevitable in the fabrication of integrated circuits. These disturbances will result in variations in the delay speci cations of manufactured circui...