119 search results - page 6 / 24 » Static Energy Reduction Techniques for Microprocessor Caches |
MICRO
2005
IEEE
14 years 1 months ago
2005
IEEE
Dynamic voltage and frequency scaling (DVFS) is an effective technique for controlling microprocessor energy and performance. Existing DVFS techniques are primarily based on hardw...
ISLPED
2005
ACM
14 years 1 months ago
2005
ACM
High power consumption and low energy efficiency have become significant impediments to future performance improvements in modern microprocessors. This paper contributes to the so...
DAC
2002
ACM
14 years 8 months ago
2002
ACM
In this paper we propose a novel integrated circuit and architectural level technique to reduce leakage power consumption in high performance cache memories using single Vt (trans...
ICCAD
2009
IEEE
13 years 5 months ago
2009
IEEE
The emerging Spin Torque Transfer memory (STT-RAM) is a promising candidate for future on-chip caches due to STT-RAM's high density, low leakage, long endurance and high acce...
CGO
2005
IEEE
14 years 1 months ago
2005
IEEE
Modern embedded microprocessors use low power on-chip memories called scratch-pad memories to store frequently executed instructions and data. Unlike traditional caches, scratch-p...