In this paper, we present a probabilistic simulation technique to estimate the power consumption of a cmos circuit under a general delay model. This technique is based on the noti...
Significand pre-alignment is a pre requisite for floating point additions. This paper1 addresses the architectural design and energy delay evaluation of a Low Power Barrel Switch ...
R. V. K. Pillai, Dhamin Al-Khalili, Asim J. Al-Kha...
—Variations of process parameters have an important impact on reliability and yield in deep sub micron IC technologies. One methodology to estimate the influence of these effects...
Two novel low power flip-flops are presented in the paper. Proposed flip-flops use new gating techniques that reduce power dissipation deactivating the clock signal. Presented cir...
In recent years, due to rapid advances in VLSI manufacturing technology capable of packing more and more devices and wires on a chip, crosstalk has emerged as a serious problem af...