1459 search results - page 45 / 292 » Statistical Modeling for Circuit Simulation |
ICCD
2007
IEEE
14 years 7 months ago
2007
IEEE
We have developed a new statistical timing analysis approach that does not impose any assumptions on the nature of manufacturing variability and takes into account an arbitrary mo...
ICCAD
1996
IEEE
14 years 2 months ago
1996
IEEE
-- In this tutorial we discuss concepts and techniques for the accurate and efficient modeling and extraction of interconnect parasitics in VLSI designs. Due toincreasing operating...
ICCAD
1999
IEEE
14 years 2 months ago
1999
IEEE
Interconnect reduction is an important step in the design and analysis of complex interconnects found in present-day integrated circuits. This paper presents techniques for obtain...
VLSID
2005
IEEE
14 years 10 months ago
2005
IEEE
We propose a method to minimize power dissipation in current-mode CMOS analog and multiple-valued logic (MVL) circuits employing a stack of current comparators. First, we present ...
DAC
2009
ACM
14 years 4 months ago
2009
ACM
This paper proposes an equation-based multi-scenario iterative robust optimization methodology for analog/mixed-signal circuits. We show that due to local circuit performance mono...