In this paper, we propose a novel multi-mode/multi-corner sparse regression (MSR) algorithm to build large-scale performance models of integrated circuits at multiple working mode...
Wangyang Zhang, Tsung-Hao Chen, Ming Yuan Ting, Xi...
We proposed a neural segmentation model that is suitable for implementation in analog VLSIs using conventional CMOS technology. The model consists of neural oscillators mutually co...
Gessyca Maria Tovar, Eric Shun Fukuda, Tetsuya Asa...
Subthreshold operation is emerging as an energy-saving approach to many new applications. This paper examines energy minimization for circuits operating in the subthreshold region...
Delay faults are an increasingly important test challenge. Traditional open and bridge fault models are incomplete because only the functional fault or a subset of delay fault are...
Zhuo Li, Xiang Lu, Wangqi Qiu, Weiping Shi, D. M. ...
Abstract. Symbolic Trajectory Evaluation (STE) is a powerful technique for hardware model checking. It is based on a 3-valued symbolic simulation, using 0,1 and X n"), where t...