5 search results - page 1 / 1 » Storage assignment during high-level synthesis for configura... |
ICCAD
2005
IEEE
14 years 4 months ago
2005
IEEE
ASAP
2007
IEEE
13 years 9 months ago
2007
IEEE
In high-level synthesis, as for compilers, an important question is when register assignment should take place. Unlike compilers for which the processor architecture is given, syn...
VLSID
2005
IEEE
14 years 7 months ago
2005
IEEE
An Application Specific Instruction Set Processor (ASIP) exploits special characteristics of the given application(s) to meet the desired performance, cost and power requirements....
ICCAD
2001
IEEE
14 years 4 months ago
2001
IEEE
Tight data- and timing constraints are imposed by communication and multimedia applications. The architecture for the embedded processor imply resource constraints. Instead of ran...
AHS
2007
IEEE
13 years 11 months ago
2007
IEEE
In this paper, we propose a design methodology for implementing a multimode (or multi-configuration) and multi-throughput system into a single hardware architecture. The inputs of...