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DAC
2009
ACM
14 years 11 months ago
O-Router:an optical routing framework for low power on-chip silicon nano-photonic integration
In this work, we present a new optical routing framework, O-Router for future low-power on-chip optical interconnect integration utilizing silicon compatible nano-photonic devices...
Duo Ding, Yilin Zhang, Haiyu Huang, Ray T. Chen, D...
DAC
2006
ACM
14 years 11 months ago
A family of cells to reduce the soft-error-rate in ternary-CAM
Modern integrated circuits require careful attention to the soft-error rate (SER) resulting from bit upsets, which are normally caused by alpha particle or neutron hits. These eve...
Navid Azizi, Farid N. Najm
VLSID
2007
IEEE
120views VLSI» more  VLSID 2007»
14 years 10 months ago
Statistical Leakage and Timing Optimization for Submicron Process Variation
Leakage power is becoming a dominant contributor to the total power consumption and dual-Vth assignment is an efficient technique to decrease leakage power, for which effective de...
Yuanlin Lu, Vishwani D. Agrawal
ICCD
2007
IEEE
212views Hardware» more  ICCD 2007»
14 years 6 months ago
Analytical thermal placement for VLSI lifetime improvement and minimum performance variation
DSM and nanometer VLSI designs are subject to an increasingly significant thermal effect on VLSI circuit lifetime and performance variation, which can be effectively subdued by V...
Andrew B. Kahng, Sung-Mo Kang, Wei Li, Bao Liu
ICCAD
2004
IEEE
113views Hardware» more  ICCAD 2004»
14 years 6 months ago
Vdd programmability to reduce FPGA interconnect power
Power is an increasingly important design constraint for FPGAs in nanometer technologies. Because interconnect power is dominant in FPGAs, we design Vdd-programmable interconnect ...
Fei Li, Yan Lin, Lei He