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ISCAS
1994
IEEE
92views Hardware» more  ISCAS 1994»
14 years 2 months ago
A Study on the Stochastic Computation Using the Ratio of One Pulses and Zero Pulses
Stochastic computation uses pulse streams to represent numbers. In this paper, we have studied the novel method to implement the number system which uses the ratio of the number o...
Seung-Jai Min, Eel-Wan Lee, Soo-Ik Chae
CCECE
2009
IEEE
14 years 3 months ago
A full-rate truly monolithic CMOS CDR for low-cost applications
A truly monolithic clock and data recovery (CDR) circuit for low cost low-end data communication systems has been realized in 0.6ȝm CMOS. The implemented CDR comprises a phase-an...
Bangli Liang, Zhigong Wang, Dianyong Chen, Bo Wang...
ISPD
2010
ACM
205views Hardware» more  ISPD 2010»
14 years 5 months ago
Total sensitivity based dfm optimization of standard library cells
Standard cells are fundamental circuit building blocks designed at very early design stages. Nanometer standard cells are prone to lithography proximity and process variations. Ho...
Yongchan Ban, Savithri Sundareswaran, David Z. Pan
GLVLSI
2009
IEEE
167views VLSI» more  GLVLSI 2009»
14 years 5 months ago
Dual-threshold pass-transistor logic design
This paper introduces pass-transistor logic design with dualthreshold voltages. A set of single-rail, fully restored, passtransistor gates are presented. Logic transistors are imp...
Lara D. Oliver, Krishnendu Chakrabarty, Hisham Z. ...
FPGA
2007
ACM
185views FPGA» more  FPGA 2007»
14 years 4 months ago
Power-aware FPGA logic synthesis using binary decision diagrams
Power consumption in field programmable gate arrays (FPGAs) has become an important issue as the FPGA market has grown to include mobile platforms. In this work we present a power...
Kevin Oo Tinmaung, David Howland, Russell Tessier