Sciweavers

13 search results - page 2 / 3
» Subgridding method for speeding up FD-TLM circuit simulation
Sort
View
TCAD
1998
127views more  TCAD 1998»
13 years 7 months ago
Gate-level power estimation using tagged probabilistic simulation
In this paper, we present a probabilistic simulation technique to estimate the power consumption of a cmos circuit under a general delay model. This technique is based on the noti...
Chih-Shun Ding, Chi-Ying Tsui, Massoud Pedram
ISPD
2006
ACM
103views Hardware» more  ISPD 2006»
14 years 1 months ago
High accurate pattern based precondition method for extremely large power/ground grid analysis
In this paper, we propose more accurate power/ground network circuit model, which consider both via and ground bounce effects to improve the performance estimation accuracy of on-...
Jin Shi, Yici Cai, Sheldon X.-D. Tan, Xianlong Hon...
ISLPED
1996
ACM
89views Hardware» more  ISLPED 1996»
13 years 11 months ago
A novel methodology for transistor-level power estimation
Transistlw-level power simulators, which are more accurate than logic-level power estimators, have been popularly used to estimate the power dissipation of CMOS circuits. In thisp...
Shi-Yu Huang, Kwang-Ting Cheng, Kuang-Chien Chen, ...
HICSS
1996
IEEE
102views Biometrics» more  HICSS 1996»
13 years 11 months ago
Evaluation of Parallel Logic Simulation Using DVSIM
Parallel simulation is expected to speed up simulation run time in a signi cant way. This paper describes a framework that is used to evaluate the performance of parallel simulati...
Gerd Meister
ASPDAC
2006
ACM
74views Hardware» more  ASPDAC 2006»
14 years 1 months ago
Macromodelling oscillators using Krylov-subspace methods
— We present an efficient method for automatically extracting unified amplitude/phase macromodels of arbitrary oscillators from their SPICE-level circuit descriptions. Such com...
Xiaolue Lai, Jaijeet S. Roychowdhury