This paper presents a BIST technique that allows the synchronization of multiple scan chains clocked at different frequencies. The technique is used to improve performance testing...
Benoit Nadeau-Dostie, Dwayne Burek, Abu S. M. Hass...
: In this study, we propose two types of coupled oscillators networks and investigate their steady states. One network has two-dimensional honeycomb structure. The other network ha...
Capacitance coupling can have a significant impact on gate delay in today's deep submicron circuits. In this paper we present a static timing analysis tool that calculates th...
Noise immunity is becomingone of the most important design parameters for deep-sub-micron (DSM) technologies. Asynchronous circuits seem to be a good candidate to alleviate the pr...
Alexander Taubin, Alex Kondratyev, Jordi Cortadell...
This paper describes the design of a delay-insensitive (DI) Cell Matrix. This architecture allows for massively parallel, self-determined operation and can be used to implement reg...