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» System-level power optimization: techniques and tools
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ICCAD
1997
IEEE
137views Hardware» more  ICCAD 1997»
13 years 11 months ago
Optimization techniques for high-performance digital circuits
The relentless push for high performance in custom digital circuits has led to renewed emphasis on circuit optimization or tuning. The parameters of the optimization are typically...
Chandramouli Visweswariah
SIGMOD
1996
ACM
99views Database» more  SIGMOD 1996»
14 years 3 days ago
A Query Language for Multidimensional Arrays: Design, Implementation, and Optimization Techniques
While much recent research has focussed on extending databases beyond the traditional relational model, relatively little has been done to develop database tools for querying data...
Leonid Libkin, Rona Machlin, Limsoon Wong
VLSID
2002
IEEE
151views VLSI» more  VLSID 2002»
14 years 8 months ago
Mode Selection and Mode-Dependency Modeling for Power-Aware Embedded Systems
Among the many techniques for system-level power management, it is not currently possible to guarantee timing constraints and have a comprehensive system model at the same time. S...
Dexin Li, Pai H. Chou, Nader Bagherzadeh
CODES
2005
IEEE
14 years 1 months ago
SOMA: a tool for synthesizing and optimizing memory accesses in ASICs
Arbitrary memory dependencies and variable latency memory systems are major obstacles to the synthesis of large-scale ASIC systems in high-level synthesis. This paper presents SOM...
Girish Venkataramani, Tiberiu Chelcea, Seth Copen ...
GLVLSI
2005
IEEE
85views VLSI» more  GLVLSI 2005»
14 years 1 months ago
VLSI CAD tool protection by birthmarking design solutions
Many techniques have been proposed in the past for the protection of VLSI design IPs (intellectual property). CAD tools and algorithms are intensively used in all phases of modern...
Lin Yuan, Gang Qu, Ankur Srivastava