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» SystemJ: A GALS language for system level design
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DAC
2004
ACM
14 years 28 days ago
Extending the transaction level modeling approach for fast communication architecture exploration
System-on-Chip (SoC) designs are increasingly becoming more complex. Efficient on-chip communication architectures are critical for achieving desired performance in these systems....
Sudeep Pasricha, Nikil D. Dutt, Mohamed Ben-Romdha...
DAC
2002
ACM
14 years 8 months ago
High-Level specification and automatic generation of IP interface monitors
A central problem in functional verification is to check that a circuit block is producing correct outputs while enforcing that the environment is providing legal inputs. To attac...
Marcio T. Oliveira, Alan J. Hu
MEMOCODE
2010
IEEE
13 years 5 months ago
Proving transaction and system-level properties of untimed SystemC TLM designs
Electronic System Level (ESL) design manages the complexity of todays systems by using abstract models. In this context Transaction Level Modeling (TLM) is state-of-theart for desc...
Daniel Große, Hoang M. Le, Rolf Drechsler
DATE
2006
IEEE
126views Hardware» more  DATE 2006»
14 years 1 months ago
Communication and co-simulation infrastructure for heterogeneous system integration
With the increasing complexity and heterogeneity of embedded electronic systems, a unified design methodology at evels of abstraction becomes a necessity. Meanwhile, it is also i...
Guang Yang 0004, Xi Chen, Felice Balarin, Harry Hs...
VLSID
2003
IEEE
253views VLSI» more  VLSID 2003»
14 years 7 months ago
High Level Synthesis from Sim-nML Processor Models
The design of modern complex embedded systems require a high level of abstraction of the design. The SimnML[1] is a specification language to model processors for such designs. Se...
Souvik Basu, Rajat Moona