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» Test Generation and Fault Localization for Quantum Circuits
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ICCAD
2000
IEEE
171views Hardware» more  ICCAD 2000»
13 years 12 months ago
A Parametric Test Method for Analog Components in Integrated Mixed-Signal Circuits
In this paper, we present a novel approach to use test stimuli generated by digital components of a mixed-signal circuit for testing its analog components. A wavelet transform is ...
Michael Pronath, Volker Gloeckel, Helmut E. Graeb
TCAD
2002
106views more  TCAD 2002»
13 years 7 months ago
Design of hierarchical cellular automata for on-chip test pattern generator
This paper introduces the concept of hierarchical cellular automata (HCA). The theory of HCA is developed over the Galois extension field (2 ), where each cell of the CA can store ...
Biplab K. Sikdar, Niloy Ganguly, Parimal Pal Chaud...
DATE
1999
IEEE
102views Hardware» more  DATE 1999»
13 years 11 months ago
Minimal Length Diagnostic Tests for Analog Circuits using Test History
In this paper we propose an efficient transient test generation method to comprehensively test analog circuits using minimum test time. A divide and conquer strategy is formulated...
Alfred V. Gomes, Abhijit Chatterjee
DATE
2006
IEEE
108views Hardware» more  DATE 2006»
14 years 1 months ago
Test compaction for transition faults under transparent-scan
Transparent-scan was proposed as an approach to test generation and test compaction for scan circuits. Its effectiveness was demonstrated earlier in reducing the test application ...
Irith Pomeranz, Sudhakar M. Reddy
ICTAI
2002
IEEE
14 years 12 days ago
A Genetic Testing Framework for Digital Integrated Circuits
In order to reduce the time-to-market and simplify gatelevel test generation for digital integrated circuits, GAbased functional test generation techniques are proposed for behavi...
Xiaoming Yu, Alessandro Fin, Franco Fummi, Elizabe...