203 search results - page 4 / 41 » Test Generation and Fault Localization for Quantum Circuits |
ICCAD
1998
IEEE
13 years 11 months ago
1998
IEEE
A method is presented for identifying primitive path-delay faults in non-scan sequential circuits and generating robust tests for all robustly testable primitive faults. It uses t...
DATE
2005
IEEE
14 years 1 months ago
2005
IEEE
We investigate a new fault ordering heuristic for test generation in full-scan circuits. The heuristic is referred to as the accidental detection index. It associates a value ADI ...
DATE
2000
IEEE
13 years 12 months ago
2000
IEEE
Process variation has forever been the major fail cause of analog circuit where small deviations in component values cause large deviations in the measured output parameters. This...
ATS
2005
IEEE
13 years 9 months ago
2005
IEEE
Reversibility is of interest in achieving extremely low power dissipation; it is also an inherent design requirement of quantum computation. Logical fault models for conventional ...
JISE
2000
13 years 7 months ago
2000
We present an algorithm for identifyinga set of faults that do not have to be targeted by a sequential delay fault test generator. These faults either cannot independently aect th...