1016 search results - page 108 / 204 » Test Generation for Designs with On-Chip Clock Generators |
DAC
2002
ACM
14 years 10 months ago
2002
ACM
This paper introduces an FPGA IP evaluation and delivery system that operates within Java applets. The use of such applets allows designers to create, evaluate, test, and obtain F...
ICCD
2008
IEEE
14 years 6 months ago
2008
IEEE
— Verification remains an integral and crucial phase of today’s microprocessor design and manufacturing process. Unfortunately, with soaring design complexities and decreasing...
DAC
2006
ACM
14 years 10 months ago
2006
ACM
Three-dimensional (3-D) integrated circuits have emerged as promising candidates to overcome the interconnect bottlenecks of nanometer scale designs. While they offer several othe...
AIIDE
2009
13 years 10 months ago
2009
We examine the problem of self-adaptation in game-playing agents as the game requirements evolve incrementally. The goal of our current work is to develop an interactive environme...
ISCAS
2007
IEEE
14 years 3 months ago
2007
IEEE
Abstract—This paper presents a low power 4-bit ADC for subGHz Ultra Wideband (UWB) receivers. The power efficiency is achieved by taking advantage of the low duty cycle feature o...