112 search results - page 8 / 23 » Test generation in VLSI circuits for crosstalk noise |
VLSID
2002
IEEE
14 years 8 months ago
2002
IEEE
We describe a built-in test pattern generation method for scan circuits. The method is based on partitioning and storage of test sets. Under this method, a precomputed test set is...
GLVLSI
2009
IEEE
13 years 11 months ago
2009
IEEE
A methodology is proposed to efficiently estimate the substrate noise generated by large scale aggressor circuits. Small spatial voltage differences within the ground distribution...
DATE
2010
IEEE
14 years 22 days ago
2010
IEEE
When testing delay faults on critical paths, conventional structural test patterns may be applied in functionally-unreachable states, leading to over-testing or under-testing of t...
GLVLSI
2003
IEEE
14 years 28 days ago
2003
IEEE
With scaling down to deep submicron and nanometer technologies, noise immunity is becoming a metric of the same importance as power, speed, and area. Smaller feature sizes, low vo...
DAC
2007
ACM
14 years 8 months ago
2007
ACM
Due to shrinking technology, increasing functional frequency and density, and reduced noise margins with supply voltage scaling, the sensitivity of designs to supply voltage noise...