137 search results - page 14 / 28 » Test purpose generation in an industrial application |
ICCAD
1999
IEEE
13 years 11 months ago
1999
IEEE
Available techniques for testing core-based systems-on-a-chip (SOCs) do not provide a systematic means for synthesising low-overhead test architectures and compact test solutions....
IJVR
2006
13 years 7 months ago
2006
In this article we propose an architecture for the inclusion and exploitation of semantic aspects in a CAD environment. Our schema focuses on the enhancement and improvement of a c...
CORR
2010
Springer
13 years 7 months ago
2010
Springer
As one of the newest members in the field of artificial immune systems (AIS), the Dendritic Cell Algorithm (DCA) is based on behavioural models of natural dendritic cells (DCs). U...
ISMVL
2007
IEEE
14 years 1 months ago
2007
IEEE
The clock rate of modern chips is still increasing and at the same time the gate size decreases. As a result, already slight variations during the production process may cause a f...
DAC
2010
ACM
13 years 11 months ago
2010
ACM
As the geometry shrinking faces severe limitations, 3D wafer stacking with through silicon via (TSV) has gained interest for future SOC integration. Since TSV fill material and s...