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CODES
2005
IEEE
14 years 1 months ago
Aggregating processor free time for energy reduction
Even after carefully tuning the memory characteristics to the application properties and the processor speed, during the execution of real applications there are times when the pr...
Aviral Shrivastava, Eugene Earlie, Nikil D. Dutt, ...
GLVLSI
2005
IEEE
99views VLSI» more  GLVLSI 2005»
14 years 1 months ago
An empirical study of crosstalk in VDSM technologies
We perform a detailed study of various crosstalk scenarios in VDSM technologies by using a distributed model of the crosstalk site and make a number of key observations about the ...
Shahin Nazarian, Massoud Pedram, Emre Tuncer
INFOCOM
2005
IEEE
14 years 1 months ago
Minimum energy accumulative routing in wireless networks
— In this paper, we propose to address the energy efficient routing problem in multi-hop wireless networks with accumulative relay. In the accumulative relay model, partially ov...
Jiangzhuo Chen, Lujun Jia, Xin Liu, Guevara Noubir...
MICRO
2005
IEEE
126views Hardware» more  MICRO 2005»
14 years 1 months ago
Cost Sensitive Modulo Scheduling in a Loop Accelerator Synthesis System
Scheduling algorithms used in compilers traditionally focus on goals such as reducing schedule length and register pressure or producing compact code. In the context of a hardware...
Kevin Fan, Manjunath Kudlur, Hyunchul Park, Scott ...
VISUALIZATION
2005
IEEE
14 years 1 months ago
Batched Multi Triangulation
The Multi Triangulation framework (MT) is a very general approach for managing adaptive resolution in triangle meshes. The key idea is arranging mesh fragments at different resolu...
Paolo Cignoni, Fabio Ganovelli, Enrico Gobbetti, F...
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