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IPPS
1998
IEEE
14 years 2 months ago
Evaluation of a Low-Power Reconfigurable DSP Architecture
Abstract. Programmability is an important capability that provides flexible computing devices, but it incurs significant performance and power penalties. We have proposed an archit...
Arthur Abnous, Katsunori Seno, Yuji Ichikawa, Marl...
DATE
2004
IEEE
125views Hardware» more  DATE 2004»
14 years 1 months ago
Extremely Low-Power Logic
For extremely Low-power Logic, three very new and promising techniques will be described. The first are methods on circuit and system level for reduced supply voltages. In large l...
Christian Piguet, Jacques Gautier, Christoph Heer,...
DATE
2005
IEEE
111views Hardware» more  DATE 2005»
14 years 13 hour ago
MINLP Based Topology Synthesis for Delta Sigma Modulators Optimized for Signal Path Complexity, Sensitivity and Power Consumptio
This paper proposes a novel architecture synthesis algorithm for single-loop single-bit ∆Σ modulators. We defined a generic modulator architecture and derived its noise and si...
Hua Tang, Ying Wei, Alex Doboli
CSREAESA
2004
13 years 11 months ago
Survey and Evaluation of Low-Power Full-Adder Cells
In this paper, we survey various designs of low-power full-adder cells from conventional CMOS to really inventive XOR-based designs. We further describe simulation experiments tha...
Ahmed Sayed, Hussain Al-Asaad
DAGSTUHL
2007
13 years 11 months ago
Lifetime Extension of Higher Class UHF RFID Tags using special Power Management Techniques and Energy Harvesting Devices
Abstract. Enhanced RFID tag technology especially in the UHF frequency range provides extended functionality like high operating range and sensing and monitoring capabilities. Such...
Alex Janek, Christian Steger, Josef Preishuber-Pfl...