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DATE
2005
IEEE
121views Hardware» more  DATE 2005»
14 years 3 months ago
Joint Power Management of Memory and Disk
This paper presents a scheme to combine memory and power management for achieving better energy reduction. Our method periodically adjusts the size of physical memory and the time...
Le Cai, Yung-Hsiang Lu
SBCCI
2005
ACM
132views VLSI» more  SBCCI 2005»
14 years 3 months ago
Design and power optimization of CMOS RF blocks operating in the moderate inversion region
In this work the design of radiofrequency CMOS circuit blocks in the 910MHz ISM band, while biasing the MOS transistor in the moderate inversion region, is analyzed. An amplifier ...
Leonardo Barboni, Rafaella Fiorelli
ISCAS
2002
IEEE
80views Hardware» more  ISCAS 2002»
14 years 3 months ago
Power line communication front-ends based on ADSL technology
The practical implementation of communication over power lines (PLC) using an Asymmetric Digital Subscriber Line (ADSL) front-end is discussed. Both PLC and ADSL modems are based ...
J. Van den Keybus, B. Bolsens, Johan Driesen, Ronn...
ISLPED
1997
ACM
96views Hardware» more  ISLPED 1997»
14 years 2 months ago
Re-mapping for low power under tight timing constraints
In this paper1 we propose a novel approach to synthesis for low power under tight timing constraints. Starting from a mapped netlist, we apply a powerful generalized matching algo...
Patrick Vuillod, Luca Benini, Giovanni De Micheli
DAC
2004
ACM
14 years 1 months ago
On test generation for transition faults with minimized peak power dissipation
This paper presents a method of generating tests for transition faults using tests for stuck-at faults such that the peak power is the minimum possible using a given set of tests ...
Wei Li, Sudhakar M. Reddy, Irith Pomeranz