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TVLSI
2010
13 years 2 months ago
C-Pack: A High-Performance Microprocessor Cache Compression Algorithm
Microprocessor designers have been torn between tight constraints on the amount of on-chip cache memory and the high latency of off-chip memory, such as dynamic random access memor...
Xi Chen, Lei Yang, Robert P. Dick, Li Shang, Haris...
VLSID
2006
IEEE
240views VLSI» more  VLSID 2006»
14 years 8 months ago
An Efficient and Accurate Logarithmic Multiplier Based on Operand Decomposition
Logarithmic Number Systems (LNS) offer a viable alternative in terms of area, delay and power to binary number systems for multiplication and division operations in signal process...
Venkataraman Mahalingam, N. Ranganathan
ISMAR
2008
IEEE
14 years 2 months ago
Virtual redlining for civil engineering in real environments
Field workers of utility companies are regularly engaged in outdoor tasks such as network planning, maintenance and inspection of underground infrastructure. Redlining is the term...
Gerhard Schall, Erick Méndez, Dieter Schmal...
ICINCO
2004
122views Robotics» more  ICINCO 2004»
13 years 9 months ago
Data Security Considerations in Modern Automation Networks
: The automation manufacturing business has reached its turning point and manufacturers are forced to create new business areas. Their expertise about field devices will be the sou...
Mikko Salmenperä, Jari Seppälä
DSD
2010
IEEE
161views Hardware» more  DSD 2010»
13 years 7 months ago
Design of Trace-Based Split Array Caches for Embedded Applications
—Since many embedded systems execute a predefined set of programs, tuning system components to application programs and data is the approach chosen by many design techniques to o...
Alice M. Tokarnia, Marina Tachibana