132 search results - page 11 / 27 » Three-Dimensional Cache Design Exploration Using 3DCacti |
VLDB
1997
ACM
13 years 11 months ago
1997
ACM
Abstract. Recent results in the Rio project at the University of Michigan show that it is possible to create an area of main memory that is as safe as disk from operating system cr...
ICS
2009
Tsinghua U.
14 years 2 months ago
2009
Tsinghua U.
The speed gap between processor and memory continues to limit performance. To address this problem, we explore the potential of eliminating Zero Loads—loads accessing memory loc...
DAC
2008
ACM
14 years 8 months ago
2008
ACM
Today, embedded processors are expected to be able to run complex, algorithm-heavy applications that were originally designed and coded for general-purpose processors. As a result...
GLVLSI
2010
IEEE
14 years 19 days ago
2010
IEEE
On-chip memory organization is one of the most important aspects that can influence the overall system behavior in multiprocessor systems. Following the trend set by high-perform...
DAC
2009
ACM
14 years 7 days ago
2009
ACM
Dynamic binary translation (DBT) can be used to address important issues in embedded systems. DBT systems store translated code in a software-managed code cache. Unlike general-pu...