144 search results - page 14 / 29 » Time-Space Tradeoffs for Satisfiability |
VLSID
2009
IEEE
14 years 8 months ago
2009
IEEE
Power density has been increasing at an alarming rate in recent processor generations resulting in high on-chip temperature. Higher temperature results in poor reliability and inc...
ICASSP
2009
IEEE
14 years 2 months ago
2009
IEEE
We study the spatial-temporal sampling of a linear diffusion field, and show that it is possible to compensate for insufficient spatial sampling densities by oversampling in tim...
GLOBECOM
2008
IEEE
14 years 2 months ago
2008
IEEE
— Failure-Rate Minimization is becoming one of the major design issues in wireless sensor network (WSN) architecture due to multiple available Functional-units (FUs). There is a ...
ISCAS
2007
IEEE
14 years 1 months ago
2007
IEEE
— This paper describes a new power minimizing method by optimizing supply voltage control and minimizing leakage in active and standby modes, respectively. In the active mode, th...
DFT
2003
IEEE
14 years 27 days ago
2003
IEEE
A new methodology for designing logic circuits with partial error masking is described. The key idea is to exploit the asymmetric soft error susceptibility of nodes in a logic cir...