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DATE
2002
IEEE
135views Hardware» more  DATE 2002»
14 years 14 days ago
Reducing Test Application Time Through Test Data Mutation Encoding
In this paper we propose a new compression algorithm geared to reduce the time needed to test scan-based designs. Our scheme compresses the test vector set by encoding the bits th...
Sherief Reda, Alex Orailoglu
ITC
2002
IEEE
72views Hardware» more  ITC 2002»
14 years 12 days ago
Test Point Insertion that Facilitates ATPG in Reducing Test Time and Data Volume
Efficient production testing is frequently hampered because current digital circuits require test sets which are too large. These test sets can be reduced significantly by means...
M. J. Geuzebroek, J. Th. van der Linden, A. J. van...
DDECS
2007
IEEE
175views Hardware» more  DDECS 2007»
14 years 1 months ago
Analyzing Test and Repair Times for 2D Integrated Memory Built-in Test and Repair
—An efficient on-chip infrastructure for memory test and repair is crucial to enhance yield and availability of SoCs. A commonly used repair strategy is to equip memories with sp...
Philipp Öhler, Sybille Hellebrand, Hans-Joach...
ISCAS
2002
IEEE
85views Hardware» more  ISCAS 2002»
14 years 12 days ago
Automated test development and test time reduction for RF subsystems
Sule Ozev, Alex Orailoglu, Hosam Haggag