264 search results - page 23 / 53 » Timing driven power gating |
ISSS
2002
IEEE
14 years 1 months ago
2002
IEEE
With the popularity of wireless communication devices a new important dimension of embedded systems design has arisen, that of security. This paper presents for the first time des...
ERSA
2006
13 years 10 months ago
2006
Optically Reconfigurable Gate Arrays (ORGAs), by exploiting the large storage capacity of holographic memory, offer the possibility of providing a virtual gate count that is much l...
ICCAD
2001
IEEE
14 years 5 months ago
2001
IEEE
— Modern sub-micron VLSI designs include huge power grids that are required to distribute large amounts of current, at increasingly lower voltages. The resulting voltage drop on ...
ASPDAC
2004
ACM
14 years 2 months ago
2004
ACM
This paper proposes a thread partitioning algorithm in low power high-level synthesis. The algorithm is applied to high-level synthesis systems. In the systems, we can describe pa...
ISCAS
2007
IEEE
14 years 2 months ago
2007
IEEE
— This paper describes a new power minimizing method by optimizing supply voltage control and minimizing leakage in active and standby modes, respectively. In the active mode, th...