57 search results - page 5 / 12 » Timing metrics for physical design of deep submicron technol... |
ICCAD
2001
IEEE
14 years 4 months ago
2001
IEEE
In deep submicron VLSI circuits, interconnect reliability due to electromigration and thermal effects is fast becoming a serious design issue particularly for long signal lines. T...
ICCD
1999
IEEE
13 years 11 months ago
1999
IEEE
With the reducing distances between wires in deep submicron technologies, coupling capacitances are becoming significant as their magnitude becomes comparable to the area capacita...
ASPDAC
2004
ACM
14 years 23 days ago
2004
ACM
As the process technology advances into the deep submicron era, interconnect plays a dominant role in determining circuit performance and signal integrity. Buffer insertion is one...
ISQED
2002
IEEE
14 years 7 days ago
2002
IEEE
As the process technology advances into the deep submicron era, interconnect plays a dominant role in determining circuit performance. Buffer insertion/sizing and wire sizing are ...
VLSID
2002
IEEE
14 years 7 months ago
2002
IEEE
Increasing complexity of the functionalities and the resultant growth in number of gates integrated in a chip coupled with shrinking geometries and short cycle time requirements br...