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» Tools and Methodologies for Low Power Design
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DAC
2007
ACM
16 years 6 months ago
Variation Resilient Low-Power Circuit Design Methodology using On-Chip Phase Locked Loop
This paper presents a variation resilient circuit design technique for maintaining parametric yield of design under inherent variation in process parameters. We propose to utilize...
Kunhyuk Kang, Kee-Jong Kim, Kaushik Roy
130
Voted
ICCAD
1999
IEEE
81views Hardware» more  ICCAD 1999»
15 years 10 months ago
A novel design methodology for high performance and low power digital filters
Khurram Muhammad, Kaushik Roy
102
Voted
ITC
2000
IEEE
55views Hardware» more  ITC 2000»
15 years 10 months ago
Low power BIST design by hypergraph partitioning: methodology and architectures
Patrick Girard, Christian Landrault, Loïs Gui...
139
Voted
DAC
1998
ACM
15 years 9 months ago
Design Methodology of Ultra Low-Power MPEG4 Codec Core Exploiting Voltage Scaling Techniques
Kimiyoshi Usami, Mutsunori Igarashi, Takashi Ishik...
157
Voted
ISLPED
1999
ACM
131views Hardware» more  ISLPED 1999»
15 years 10 months ago
Challenges in clockgating for a low power ASIC methodology
Gating the clock is an important technique used in low power design to disable unused modules of a circuit. Gating can save power by both preventing unnecessary activiiy in the lo...
David Garrett, Mircea R. Stan, Alvar Dean