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» Use of local biasing in designing analog integrated circuits
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CDES
2006
107views Hardware» more  CDES 2006»
13 years 9 months ago
An Algorithm for Yield Improvement via Local Positioning and Resizing
The ability to improve the yield of integrated circuits through layout modification has been recognized and several techniques for yield enhanced routing and compaction have been ...
Vazgen Karapetyan
ICCAD
2004
IEEE
114views Hardware» more  ICCAD 2004»
14 years 4 months ago
High-level synthesis using computation-unit integrated memories
Abstract— High-level synthesis (HLS) of memory-intensive applications has featured several innovations in terms of enhancements made to the basic memory organization and data lay...
Chao Huang, Srivaths Ravi, Anand Raghunathan, Nira...
DATE
1999
IEEE
162views Hardware» more  DATE 1999»
13 years 12 months ago
MOCSYN: Multiobjective Core-Based Single-Chip System Synthesis
In this paper, we present a system synthesis algorithm, called MOCSYN, which partitions and schedules embedded system specifications to intellectual property cores in an integrate...
Robert P. Dick, Niraj K. Jha
WSC
1998
13 years 9 months ago
SEAMS: Simulation Environment for VHDL-AMS
VHDL-AMS is an Analog and Mixed-Signal extension to the Very High Speed Integrated Circuit Hardware Description Language (VHDL). With the standardization of VHDL-AMS, capable and ...
Peter Frey, Kathiresan Nellayappan, Vasudevan Sahn...
VLSID
2004
IEEE
114views VLSI» more  VLSID 2004»
14 years 8 months ago
High-Speed Optoelectronics Receivers in SiGe
This paper focuses on the investigation of integrated CMOS and Silicon/Germanium (SiGe) devices for highspeed optical receiver circuits. In this paper, we present several competit...
Amit Gupta, Steven P. Levitan, Leo Selavo, Donald ...