643 search results - page 90 / 129 » Using Hardware Counters to Automatically Improve Memory Perf... |
ISCA
2006
IEEE
14 years 2 months ago
2006
IEEE
Performance loss due to long-latency memory accesses can be reduced by servicing multiple memory accesses concurrently. The notion of generating and servicing long-latency cache m...
ASPLOS
2010
ACM
14 years 3 days ago
2010
ACM
Power consumption and DRAM latencies are serious concerns in modern chip-multiprocessor (CMP or multi-core) based compute systems. The management of the DRAM row buffer can signif...
FCCM
2009
IEEE
14 years 3 months ago
2009
IEEE
Although soft microprocessors are widely used in FPGAs, limited work has been performed regarding how to automatically and efficiently generate soft multiprocessors. In this paper...
FPGA
2005
ACM
14 years 2 months ago
2005
ACM
Recent works demonstrate several benefits of synthesizing software binaries onto FPGA hardware, including incorporating hardware design into established software tool flows with m...
FPGA
2007
ACM
14 years 3 months ago
2007
ACM
Shrinking time-to-market and high demand for productivity has driven traditional hardware designers to use design methodologies that start from high-level languages. However, meet...