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» Verifying VLSI Circuits
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GLVLSI
2003
IEEE
122views VLSI» more  GLVLSI 2003»
14 years 3 months ago
Cooling of integrated circuits using droplet-based microfluidics
Decreasing feature sizes and increasing package densities are making thermal issues extremely important in IC design. Uneven thermal maps and hot spots in ICs cause physical stres...
Vamsee K. Pamula, Krishnendu Chakrabarty
DFT
2000
IEEE
105views VLSI» more  DFT 2000»
14 years 2 months ago
Low-Speed Scan Testing of Charge-Sharing Faults for CMOS Domino Circuits
Because domino logic design offers smaller area and higher speed than complementary CMOS design, it has been very popularly used to design highperformance processors. However: dom...
Ching-Hwa Cheng, Jinn-Shyan Wang, Shih-Chieh Chang...
DAC
2003
ACM
14 years 11 months ago
Parameter variations and impact on circuits and microarchitecture
Parameter variation in scaled technologies beyond 90nm will pose a major challenge for design of future high performance microprocessors. In this paper, we discuss process, voltag...
Shekhar Borkar, Tanay Karnik, Siva Narendra, James...
VLSID
2002
IEEE
115views VLSI» more  VLSID 2002»
14 years 10 months ago
A Partitioning and Storage Based Built-In Test Pattern Generation Method for Scan Circuits
We describe a built-in test pattern generation method for scan circuits. The method is based on partitioning and storage of test sets. Under this method, a precomputed test set is...
Irith Pomeranz, Sudhakar M. Reddy
ISVLSI
2003
IEEE
86views VLSI» more  ISVLSI 2003»
14 years 3 months ago
Novel Circuit Styles for Minimization of Floating Body Effects in Scaled PD-SOI CMOS
SOI (silicon-on-insulator) technology suffers from a number of floating body effects, most notably parasitic bipolar and history effects. These are influenced by the rapidly incre...
Koushik K. Das, Richard B. Brown