1093 search results - page 88 / 219 » Verifying VLSI Circuits |
DAC
2004
ACM
14 years 3 months ago
2004
ACM
The Pentium® 4 processor architecture uses a 2x frequency core clock[1] to implement low latency integer ops. Low Voltage Swing logic circuits implemented in 90nm technology[2] m...
DFT
2003
IEEE
14 years 3 months ago
2003
IEEE
A new methodology for designing logic circuits with partial error masking is described. The key idea is to exploit the asymmetric soft error susceptibility of nodes in a logic cir...
SBCCI
2003
ACM
14 years 3 months ago
2003
ACM
Recycling was recently proposed as a system-level design technique to facilitate the building of complex System-on-Chips (SOC) by assembling pre-designed components. Recycling all...
DFT
2009
IEEE
14 years 4 months ago
2009
IEEE
The temperature dependence of MOSFET drain current varies with supply voltage. Two distinct voltage regions exist—a normal dependence (ND) region where an increase in temperatur...
GLVLSI
2007
IEEE
14 years 4 months ago
2007
IEEE
A probabilistic power estimation technique for combinational circuits is presented. A novel set of simple waveforms is the kernel of this technique. The transition density of each...