71 search results - page 13 / 15 » nocs 2007 |
147
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AHS
2007
IEEE
15 years 8 months ago
2007
IEEE
This paper presents a mechanism for the separation of control and data flow in NoC-based SoCs consisting of multiple heterogeneous reconfigurable IP cores. This mechanism enables ...
129
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ASAP
2007
IEEE
15 years 6 months ago
2007
IEEE
Interconnect validation is an important early step toward global SoC (System-On-Chip) validation. Fast performances evaluation and design space exploration for NoCs (Networks-On-C...
140
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IESS
2007
Springer
15 years 10 months ago
2007
Springer
Abstract: The time-triggered System-on-a-Chip (SoC) architecture provides a generic multicore system platform for a family of composable and dependable giga-scale SoCs. It supports...
117
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DATE
2007
IEEE
15 years 10 months ago
2007
IEEE
In this paper we present a systematic comparison between two different implementations of a distributed Network on Chip: fully asynchronous and multi-synchronous. The NoC architec...
114
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FPL
2007
Springer
15 years 10 months ago
2007
Springer
A temporal correlation based port combination algorithm that customizes the router design in Network-on-Chip (NoC) is proposed for reconfigurable systems in order to minimize req...