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ASPDAC
1998
ACM
49views Hardware» more  ASPDAC 1998»
14 years 2 months ago
Unrolling Loops With Indeterminate Loop Counts in System Level Pipelines
This paper describes the unrolling of loops with indeterminate loop counts in system level pipelines. Two methods are discussed in this paper. The first method is the varied latenc...
Hui Guo, Sri Parameswaran
CIA
1998
Springer
14 years 2 months ago
Strategies for Querying Information Agents
In a simple cooperative MAS model where a collection of "querying agents" can send queries to a collection of "information agents", we formalize the problem of ...
Prasad Chalasani, Somesh Jha, Onn Shehory, Katia P...
ICCAD
1998
IEEE
98views Hardware» more  ICCAD 1998»
14 years 2 months ago
Determination of worst-case aggressor alignment for delay calculation
Increases in delay due to coupling can have a dramatic impact on IC performance for deep submicron technologies. To achieve maximum performance there is a need for analyzing logic...
Paul D. Gross, Ravishankar Arunachalam, Karthik Ra...
ITC
1998
IEEE
61views Hardware» more  ITC 1998»
14 years 2 months ago
Test session oriented built-in self-testable data path synthesis
Existing high-level BIST synthesis methods focus on one objective, minimizing either area overhead or test time. Hence, those methods do not render exploration of large design spa...
Han Bin Kim, Takeshi Takahashi, Dong Sam Ha
ASPLOS
1998
ACM
14 years 2 months ago
Fast Out-Of-Order Processor Simulation Using Memoization
Our new out-of-order processor simulator, FastSim, uses two innovations to speed up simulation 8–15 times (vs. Wisconsin SimpleScalar) with no loss in simulation accuracy. First...
Eric Schnarr, James R. Larus