RISC processors can be used to face the ever increasing demand for performance required by embedded systems. Nevertheless, this solution comes with the cost of poor code density. ...
Leonardo Luiz Ecco, Bruno Cardoso Lopes, Eduardo C...
This paper describes an automatic methodology for optimizing sample point selection for using in the framework of model order reduction (MOR). The procedure, based on the maximiza...
In this work, we present a new optical routing framework, O-Router for future low-power on-chip optical interconnect integration utilizing silicon compatible nano-photonic devices...
Duo Ding, Yilin Zhang, Haiyu Huang, Ray T. Chen, D...
In this paper, we propose PDRAM, a novel energy efficient main memory architecture based on phase change random access memory (PRAM) and DRAM. The paper explores the challenges i...
The latest advancements in the commercial formal model checkers have enabled the integration of formal property verification with the conventional testbench based methods in the o...
Rajeev K. Ranjan, Claudionor Coelho, Sebastian Ska...
Endosymbiotic Computing entails attaching an RF-enabled microcontroller module (endomodule) to an appliance such that it appears as a networked device in the cyber world. It enabl...
For a computing system to be trusted, it is equally important to verify that the system performs no more and no less functionalities than desired. Traditional testing and verifica...
This paper proposes an equation-based multi-scenario iterative robust optimization methodology for analog/mixed-signal circuits. We show that due to local circuit performance mono...
In this paper we present a continuous surface model to describe the interconnect geometric variation, which improves the currently used model for better accuracy while not increas...