Reuse of IP blocks has been advocated as a means to conquer the complexity of today's system-on-chip (SoC) designs. Component integration and verification in such systems is ...
With the current developments in CPU implementations, it becomes obvious that ever more parallel multicore systems will be used even in embedded controllers that require real-time...
Recent studies have shown that an attacker can retrieve confidential information from cryptographic hardware (e.g. the secret key) by introducing internal faults. A secure and re...
Jimson Mathew, Hafizur Rahaman, Abusaleh M. Jabir,...
A new SRAM design is proposed. Body biasing improves the static noise margin (SNM) improved by at least 15% compared to the standard cells. Through using this technique, lowering ...
Farshad Moradi, Dag T. Wisland, Hamid Mahmoodi, Yn...
Circuit design under process variation can be formulated mathematically as a robust optimization problem with a yield constraint. Existing methods force designers to either resort...
Yu Ben, Laurent El Ghaoui, Kameshwar Poolla, Costa...
- In a multi-core system, power and performance may be dynamically traded off by utilizing power management (PM). This paper addresses the problem of minimizing the total power con...
Mohammad Ghasemazar, Ehsan Pakbaznia, Massoud Pedr...
—In this paper we examine different possibilities of defining reduced products and ultraproducts in fuzzy predicate logics. We present analogues to the Łos Theorem for these no...
This paper explores the design space of MMU caches that accelerate virtual-to-physical address translation in processor architectures, such as x86-64, that use a radix tree page t...