We present the results of hardware experiments designed to determine the relative contribution of CMOS coupling mechanisms to off-path signal variations caused by common types of ...
James F. Plusquellic, Donald M. Chiarulli, Steven ...
The statistical variations in electrical parameters, such as transistor gain factors and interconnect resistances, due to variations in the manufacturing process are studied using...
Suriyaprakash Natarajan, Melvin A. Breuer, Sandeep...
In the presence of multiple delay faults, automated diagnostic procedures that make a single fault assumption may give an incorrect diagnosis. In this paper, a systematic approach...
This paper presents a system to evaluate the testability of an on-line testable circuit. The system operates at the RT-level, before the logic synthesis step, and allows for an ex...
This paper describes a system suited to support the Fault Injection process for microprocessor-based embedded systems. The system exploits a low-cost hardware board to monitor the...
The design and synthesis of asynchronous circuits is gaining importance in both the industrial and academic worlds. Timed circuits are a class of asynchronous circuits that incorp...
Formal approaches to HW and system design have not been generally adopted, because designers often view the modelling concepts in these approaches as unsuitable for their problems...
In hardware - software codesign paradigm often a performance estimation of the system is needed for hardware - software partitioning. The tremendous growth of application specific...