GLVLSI
2002
IEEE
14 years 12 days ago
2002
IEEE
This paper describes a new design for a hardware accelerator to support grid-based Maze Routing. Based on the direct mapped approach of Breuer and Shamsa [3], this work refines th...
GLVLSI
2002
IEEE
14 years 12 days ago
2002
IEEE
GLVLSI
2002
IEEE
14 years 12 days ago
2002
IEEE
We present a low-power sine-output Direct Digital Frequency Synthesizer (DDFS) realized in 0.18 µm CMOS that achieves 60 dBc spectral purity from DC to the Nyquist frequency. No ...
GLVLSI
2002
IEEE
14 years 12 days ago
2002
IEEE
This paper develops new techniques for detecting both stuck-open faults and resistive open faults, which result in increased delays along some paths. The improved detection of CMO...
GLVLSI
2002
IEEE
14 years 12 days ago
2002
IEEE
GLVLSI
2002
IEEE
14 years 12 days ago
2002
IEEE
A low swing domino logic technique is proposed to decrease power consumption without sacrificing noise immunity. With the proposed low swing domino logic circuit technique, active...
GLVLSI
2002
IEEE
14 years 12 days ago
2002
IEEE
— The high-order compact finite difference (HCFD) method is adapted for interconnect modeling. Based on the compact finite difference method, the HCFD method employs the Chebys...
GLVLSI
2002
IEEE
14 years 12 days ago
2002
IEEE
GLVLSI
2002
IEEE
14 years 12 days ago
2002
IEEE
Design simplification is becoming necessary to respect the target time-to-market of SoCs, and this goal can be obtained by using predesigned IP-cores. However, their correct inte...
GLVLSI
2002
IEEE
14 years 12 days ago
2002
IEEE
As an efficient representation of Extended Finite State Machines, Multiway Decision Graphs (MDG) are suitable for automatic hardware verification of Register Transfer Level (RTL) ...