GLVLSI
2008
IEEE
14 years 7 months ago
2008
IEEE
Due to the large contribution of the memory subsystem to total system power, the memory subsystem is highly amenable to customization for reduced power/energy and/or improved perf...
DELTA
2008
IEEE
14 years 7 months ago
2008
IEEE
In the design of embedded systems, especially batterypowered systems, it is important to reduce energy consumption. Cache are now used not only in general-purpose processors but a...
DATE
2008
IEEE
14 years 7 months ago
2008
IEEE
This paper proposes a dynamic cache repartitioning technique that enhances compositionality on platforms executing media applications with multiple utilization scenarios. The repa...
CODES
2008
IEEE
14 years 7 months ago
2008
IEEE
Application-specific system-on-chip platforms create the opportunity to customize the cache configuration for optimal performance with minimal chip estate. Simulation, in partic...
SBCCI
2009
ACM
14 years 7 months ago
2009
ACM
We present an application-driven customization methodology for energy-efficient inter-core communication in embedded multiprocessors. The methodology leverages configurable cach...
EMSOFT
2009
Springer
14 years 7 months ago
2009
Springer
The major obstacle to use multicores for real-time applications is that we may not predict and provide any guarantee on real-time properties of embedded software on such platforms...
DAMON
2009
Springer
14 years 7 months ago
2009
Springer
Database processes must be cache-efficient to effectively utilize modern hardware. In this paper, we analyze the importance of temporal locality and the resultant cache behavior ...
ADBIS
2009
Springer
14 years 7 months ago
2009
Springer
Abstract. Caching data reduces user-perceived latency and often enhances availability in case of server crashes or network failures. DB caching aims at local processing of declarat...
MICRO
2009
IEEE
14 years 7 months ago
2009
IEEE
3D-integration is a promising technology to help combat the “Memory Wall” in future multi-core processors. Past work has considered using 3D-stacked DRAM as a large last-level...
ISCA
2009
IEEE
14 years 7 months ago
2009
IEEE
While microprocessor designers turn to multicore architectures to sustain performance expectations, the dramatic increase in parallelism of such architectures will put substantial...