CODES
2007
IEEE
14 years 6 months ago
2007
IEEE
Caches are notorious for their unpredictability. It is difficult or even impossible to predict if a memory access results in a definite cache hit or miss. This unpredictability i...
RTSS
2008
IEEE
14 years 6 months ago
2008
IEEE
With the advent of increasingly complex hardware in realtime embedded systems (processors with performance enhancing features such as pipelines, cache hierarchy, multiple cores), ...
RTCSA
2008
IEEE
14 years 6 months ago
2008
IEEE
Cache partitioning techniques have been proposed in the past as a solution for the cache interference problem. Due to qualitative differences with general purpose platforms, real-...
MICRO
2008
IEEE
14 years 6 months ago
2008
IEEE
It is well recognized that LRU cache-line replacement can be ineffective for applications with large working sets or non-localized memory access patterns. Specifically, in lastle...
MICRO
2008
IEEE
14 years 6 months ago
2008
IEEE
—Caches ideally should have low miss rates and short access times, and should be power efficient at the same time. Such design goals are often contradictory in practice. Recent f...
ISVLSI
2008
IEEE
14 years 6 months ago
2008
IEEE
Active power used to be the primary contributor to total power dissipation of CMOS designs, but with the technology scaling, the share of leakage in total power consumption of dig...
ISVLSI
2008
IEEE
14 years 6 months ago
2008
IEEE
The share of leakage in cache power consumption increases with technology scaling. Choosing a higher threshold voltage (Vth) and/or gate-oxide thickness (Tox) for cache transistor...
IISWC
2008
IEEE
14 years 6 months ago
2008
IEEE
Dynamic binary translation systems enable a wide range of applications such as program instrumentation, optimization, and security. DBTs use a software code cache to store previou...
IEEEPACT
2008
IEEE
14 years 6 months ago
2008
IEEE
One of the essential features in modern computer systems is context switching, which allows multiple threads of execution to time-share a limited number of processors. While very ...
ICPP
2008
IEEE
14 years 7 months ago
2008
IEEE
This paper presents a two-part study on managing distributed NUCA (Non-Uniform Cache Architecture) L2 caches in a future manycore processor to obtain high singlethread program per...