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DATE
2003
IEEE
80views Hardware» more  DATE 2003»
14 years 4 months ago
Verification of Proofs of Unsatisfiability for CNF Formulas
Evguenii I. Goldberg, Yakov Novikov
DATE
2003
IEEE
85views Hardware» more  DATE 2003»
14 years 4 months ago
Set Manipulation with Boolean Functional Vectors for Symbolic Reachability Analysis
Symbolic techniques usually use characteristic functions for representing sets of states. Boolean functional vectors provide an alternate set representation which is suitable for ...
Amit Goel, Randal E. Bryant
DATE
2003
IEEE
180views Hardware» more  DATE 2003»
14 years 4 months ago
Communication Centric Architectures for Turbo-Decoding on Embedded Multiprocessors
Software implementations of channel decoding algorithms are attractive for communication systems with their large variety of existing and emerging standards due to their flexibil...
Frank Gilbert, Michael J. Thul, Norbert Wehn
DATE
2003
IEEE
123views Hardware» more  DATE 2003»
14 years 4 months ago
RTOS Modeling for System Level Design
System level synthesis is widely seen as the solution for closing the productivity gap in system design. High level system models are used in system level design for early design ...
Andreas Gerstlauer, Haobo Yu, Daniel Gajski
DATE
2003
IEEE
86views Hardware» more  DATE 2003»
14 years 4 months ago
Improved Time Domain Simulation of Optical Multimode Intrasystem Interconnects
To increase the bandwidth of high-performance intrasystem interconnections optical multimode waveguides can be used. Since the design procedure of optical interconnections has to ...
Jens Gerling, Oliver Stübbe, Jürgen Schr...
DATE
2003
IEEE
109views Hardware» more  DATE 2003»
14 years 4 months ago
Run-Time Management of Logic Resources on Reconfigurable Systems
Dynamically reconfigurable systems based on partial and dynamically reconfigurable FPGAs may have their functionality partially modified at run-time without stopping the operation...
Manuel G. Gericota, Gustavo R. Alves, Miguel L. Si...
DATE
2003
IEEE
87views Hardware» more  DATE 2003»
14 years 4 months ago
A First Step Towards Hw/Sw Partitioning of UML Specifications
This paper proposes a novel methodology tailored to design embedded systems, taking into account the emerging market needs, such as hw/sw partitioning, object-oriented specificati...
William Fornaciari, P. Micheli, Fabio Salice, L. Z...
DATE
2003
IEEE
101views Hardware» more  DATE 2003»
14 years 4 months ago
Energy Estimation for Extensible Processors
This paper presents an efficient methodology for estimating the energy consumption of application programs running on extensible processors. Extensible processors, which are incr...
Yunsi Fei, Srivaths Ravi, Anand Raghunathan, Niraj...
DATE
2003
IEEE
86views Hardware» more  DATE 2003»
14 years 4 months ago
PLFire: A Visualization Tool for Asynchronous Phased Logic Designs
We present a visualization tool called PLFire, which allows a user to observe the behavior of a Phased Logic (PL) circuit. Phased logic is a technique for realizing self-timed cir...
Kenneth Fazel, Mitchell A. Thornton, Robert B. Ree...
DATE
2003
IEEE
115views Hardware» more  DATE 2003»
14 years 4 months ago
Control Flow Driven Splitting of Loop Nests at the Source Code Level
This paper presents a novel source code transformation for control flow optimizationcalled loop nest splitting which minimizes the number of executed if-statements in loop nests ...
Heiko Falk, Peter Marwedel