DATE
2003
IEEE
14 years 4 months ago
2003
IEEE
This paper presents a new method to automatically generate posynomial symbolic expressions for the performance characteristics of analog integrated circuits. The coefficient set ...
DATE
2003
IEEE
14 years 4 months ago
2003
IEEE
DATE
2003
IEEE
14 years 4 months ago
2003
IEEE
One of the difficult problems which core-based systemon-chip (SoC) designs face is test access. For testing the cores in a SoC, a special mechanism is required, since they are no...
DATE
2003
IEEE
14 years 4 months ago
2003
IEEE
DATE
2003
IEEE
14 years 4 months ago
2003
IEEE
MorphoSys is a reconfigurable SIMD architecture. In this paper, a BSP-based ray tracing is gracefully mapped onto MorphoSys. The mapping highly exploits ray-tracing parallelism. A...
DATE
2003
IEEE
14 years 4 months ago
2003
IEEE
This paper describes a design methodology for the estimation of bus performance of a tuplespace for factory automation. The need of a tuplespace is motivated by the characteristic...
DATE
2003
IEEE
14 years 4 months ago
2003
IEEE
Reflection and automated introspection of a design in system level design frameworks are seen as necessities for the CAD tools to manipulate the designs within the tools. These f...
DATE
2003
IEEE
14 years 4 months ago
2003
IEEE
The architectural study of wireless communication systems typically requires simulations with high-level models for different analog and RF blocks. Among these blocks, frequency-t...
DATE
2003
IEEE
14 years 4 months ago
2003
IEEE
This paper presents a new technique for automatically creating analog circuit models. The method extracts - from trained neural networks - piecewise linear models expressing the l...
DATE
2003
IEEE
2003
IEEE
Exploiting the Routing Flexibility for Energy/Performance Aware Mapping of Regular NoC Architectures
14 years 4 months ago
In this paper, we present an algorithm which automatically maps the IPs onto a generic regular Network on Chip (NoC) architecture and constructs a deadlock-free deterministic rout...